The present invention relates generally to a counting circuit, and more particularly, to an address counting circuit and a semiconductor memory apparatus using the same.
In a semiconductor memory apparatus, stored data can be subsequently lost after a period of time due to leakage current. In order to cope with this problem and to keep the data from being lost, a refresh operation is performed.
Generally, the types of refresh operations include an auto refresh operation, which is performed in response to a command applied from the outside while the semiconductor memory apparatus operates, and a self refresh operation, which is performed periodically while the semiconductor memory apparatus is in a standby state.
When the semiconductor memory apparatus performs the self refresh operation, an address counting circuit for generating row addresses is needed. After the address counting circuit generates one row address, it sequentially generates row addresses in the following cycles that are counted up or down by one bit.
In addition to a refresh operation, there are various situations in the operation of a semiconductor memory apparatus (for example, a test mode) in which address counting is required. The configuration of a conventional address counting circuit for performing the address counting will be described below.
FIG. 1 is a block diagram showing a conventional address counting circuit.
Referring to FIG. 1, an address counting circuit 10 includes a counter 110 and an amplification unit 120.
As a clock signal ‘Clk’ is inputted to start address counting, the counter 110 counts up or down an initial address by one bit and sequentially outputs counted addresses.
The counted addresses are inputted to the amplification unit 120, and after being amplified to preset levels, are outputted as amplified addresses.
In this regard, since the counted addresses outputted from the counter 110 are obtained by sequentially increasing or decreasing addresses by one bit, situations arise in which several bits of an address are simultaneously toggled.
For example, when an initial address 00000 of five bits is sequentially increased by one bit, after the address is increased to 01111, all of the five bits must be toggled to increase the address to 10000.
Further, because the amplification unit 120 should amplify the respective bits of the counted addresses to the preset levels, the more the number of the bits that are toggled, the more the current consumption of the amplification unit 120.
Specifically, during a self refresh operation, current for driving a memory bank, current for counting addresses to refresh all word lines, and current for amplifying counted addresses are required. Among these currents, the amount of current required for amplifying the counted addresses is relatively greater than the amount of current required for counting the addresses, and thus the increase in current consumption of the amplification unit can be considered a major cause of an increase in the overall current consumption of a semiconductor memory apparatus.
Currently, semiconductor memory apparatuses are being included in devices such as mobile terminals, etc., in which low power consumption during the operation of he device is demanded. Accordingly, the large amount of current that is consumed for amplifying counted addresses during self refresh mode can deteriorate the operation efficiency of a semiconductor memory apparatus.